LOG IN
SIGN UP
Canary Wharfian - Online Investment Banking & Finance Community.
Sign In
or continue with e-mail and password
Forgot password?
Don't have an account?
Create an account
or continue with e-mail and password
By signing up, you agree to our Terms & Conditions and Privacy Policy.

ASIC Physical Design Engineer

ExperiencedNo visa sponsorship
Jane Street logo

at Jane Street

Proprietary Trading

Posted 12 days ago

No clicks

**ASIC Physical Design Engineer** drives advanced hardware design, testing, and deployment. Collaborating cross-functionally, this role owns end-to-end PD flows, bridges front-end/back-end design decisions, and leverages software engineering techniques to enhance hardware design processes. Proven expertise in modern PD flows, RTL, and high-level programming required. Experience with Hardcaml toolchain or OCaml is a plus, but a passion for innovative tools is essential. Fluency in English needed.

Compensation
Not specified

Currency: Not specified

City
Not specified
Country
Not specified

Full Job Description

About the Position

We are looking to hire an ASIC Physical Design Engineer to help us design, test and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure.

This isn't a traditional PD role. We're a small team where everyone works across the chip design process, and we expect our PD engineers to lead with physical design expertise but think like chip designers. You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and reason about design decisions that cross the front-end/back-end boundary. 

If you've spent your career exclusively in PD, this probably isn't the right fitbut if you've worked across the stack, either because you started as an RTL designer and moved into PD, or because you were on a smaller team where you had to wear multiple hats, we'd love to talk.

We're big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.

About You

  • You have hands-on experience building and running modern physical design flows (e.g., floorplanning, place and route, timing closure, physical verification, power analysis)
  • You don't need to have optimised every last detail of every flow, but you should have broad enough experience across PD that you can own a flow end-to-end and know where the risks are
  • Beyond PD, you can read and write RTL and understand how front-end design decisions affect physical implementationand vice versa; You think about physical design in the context of the overall chip, not just as a downstream consumer of a netlist
  • You're interested in using software engineering techniques to improve the hardware design process, and you have experience programming in a high-level language (Python, C++, Haskell, etc.)
  • Fluent in English

If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.

ASIC Physical Design Engineer

Compensation

Not specified

City: Not specified

Country: Not specified

Jane Street logo
Proprietary Trading

12 days ago

No clicks

at Jane Street

ExperiencedNo visa sponsorship

**ASIC Physical Design Engineer** drives advanced hardware design, testing, and deployment. Collaborating cross-functionally, this role owns end-to-end PD flows, bridges front-end/back-end design decisions, and leverages software engineering techniques to enhance hardware design processes. Proven expertise in modern PD flows, RTL, and high-level programming required. Experience with Hardcaml toolchain or OCaml is a plus, but a passion for innovative tools is essential. Fluency in English needed.

Full Job Description

About the Position

We are looking to hire an ASIC Physical Design Engineer to help us design, test and deploy advanced hardware. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure.

This isn't a traditional PD role. We're a small team where everyone works across the chip design process, and we expect our PD engineers to lead with physical design expertise but think like chip designers. You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and reason about design decisions that cross the front-end/back-end boundary. 

If you've spent your career exclusively in PD, this probably isn't the right fitbut if you've worked across the stack, either because you started as an RTL designer and moved into PD, or because you were on a smaller team where you had to wear multiple hats, we'd love to talk.

We're big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.

About You

  • You have hands-on experience building and running modern physical design flows (e.g., floorplanning, place and route, timing closure, physical verification, power analysis)
  • You don't need to have optimised every last detail of every flow, but you should have broad enough experience across PD that you can own a flow end-to-end and know where the risks are
  • Beyond PD, you can read and write RTL and understand how front-end design decisions affect physical implementationand vice versa; You think about physical design in the context of the overall chip, not just as a downstream consumer of a netlist
  • You're interested in using software engineering techniques to improve the hardware design process, and you have experience programming in a high-level language (Python, C++, Haskell, etc.)
  • Fluent in English

If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.